The Resource Reconfigurable Computing: Architectures, Tools and Applications : 9th International Symposium, ARC 2013, Los Angeles, CA, USA, March 25-27, 2013. Proceedings, edited by Philip Brisk, José Gabriel de Figueiredo Coutinho, Pedro C. Diniz, (electronic resource)

Reconfigurable Computing: Architectures, Tools and Applications : 9th International Symposium, ARC 2013, Los Angeles, CA, USA, March 25-27, 2013. Proceedings, edited by Philip Brisk, José Gabriel de Figueiredo Coutinho, Pedro C. Diniz, (electronic resource)

Label
Reconfigurable Computing: Architectures, Tools and Applications : 9th International Symposium, ARC 2013, Los Angeles, CA, USA, March 25-27, 2013. Proceedings
Title
Reconfigurable Computing: Architectures, Tools and Applications
Title remainder
9th International Symposium, ARC 2013, Los Angeles, CA, USA, March 25-27, 2013. Proceedings
Statement of responsibility
edited by Philip Brisk, José Gabriel de Figueiredo Coutinho, Pedro C. Diniz
Contributor
Editor
Editor
Subject
Language
  • eng
  • eng
Summary
This book constitutes the thoroughly refereed conference proceedings of the 9th International Symposium on Reconfigurable Computing: Architectures, Tools and Applications, ARC 2013, held in Los Angeles, CA, USA, in March 2013. The 28 revised papers presented, consisting of 20 full papers and 11 poster papers were carefully selected from 41 submissions. The topics covered are applications, arithmetic, design optimization for FPGAs, architectures, place and routing
Member of
Dewey number
004
http://bibfra.me/vocab/relation/httpidlocgovvocabularyrelatorsedt
  • -lPfpBe8nhM
  • U7QCBmEuoKI
  • xHXmBdy3wiY
Image bit depth
0
Language note
English
LC call number
  • QA75.5-76.95
  • TK7885-7895
Literary form
non fiction
Nature of contents
dictionaries
http://library.link/vocab/relatedWorkOrContributorName
  • ARC 2013
  • Brisk, Philip.
  • Figueiredo Coutinho, José Gabriel de.
  • Diniz, Pedro C.
Series statement
Theoretical Computer Science and General Issues
Series volume
7806
http://library.link/vocab/subjectName
  • Computer hardware
  • Computer network architectures
  • Computer software
  • Computer Hardware
  • Computer Systems Organization and Communication Networks
  • Algorithm Analysis and Problem Complexity
Label
Reconfigurable Computing: Architectures, Tools and Applications : 9th International Symposium, ARC 2013, Los Angeles, CA, USA, March 25-27, 2013. Proceedings, edited by Philip Brisk, José Gabriel de Figueiredo Coutinho, Pedro C. Diniz, (electronic resource)
Instantiates
Publication
Note
International conference proceedings
Antecedent source
mixed
Bibliography note
Includes bibliographical references and author index
Carrier category
online resource
Carrier category code
cr
Carrier MARC source
rdacarrier
Color
not applicable
Content category
text
Content type code
txt
Content type MARC source
rdacontent
Contents
Heterogeneous Reconfigurable System for Adaptive Particle Filters in Real-Time Applications -- Hardware Acceleration of Genetic Sequence Alignment -- An FPGA Acceleration for the Kd-tree Search in Photon Mapping -- SEU Resilience of DES, AES in SRAM-based FPGA -- An Architecture for IPv6 Lookup Using Parallel Index Generation Units -- Hardware Index to Set Partition Converter -- Teaching SoC Using Video Games to Improve Student Engagement -- Parameterized Design and Evaluation of Bandwidth Compressor for Floating-Point Data Streams in FPGA-based Custom Computing -- Hardware Acceleration of Matrix Multiplication Over Small Prime Finite Fields -- Flexible Design of a Modular Simultaneous Exponentiation Core for Embedded Platforms -- Architecture for Transparent Binary Acceleration of Loops with Memory Accesses -- Parametric Optimization of Reconfigurable Designs using Machine Learning -- Fast Template-based Heterogeneous MPSoC Synthesis on FPGA -- Hierarchical and Multiple Switching NoC with Floorplan based Adaptability -- Performance Analysis And Optimization of High Density Tree-Based 3D Multilevel FPGA
Dimensions
unknown
Extent
1 online resource (XVI, 238 p. 104 illus.)
File format
multiple file formats
Form of item
online
Isbn
9783642368127
Level of compression
uncompressed
Media category
computer
Media MARC source
rdamedia
Media type code
c
Other control number
10.1007/978-3-642-36812-7
Quality assurance targets
absent
Reformatting quality
access
Specific material designation
remote
System control number
  • (CKB)3280000000007557
  • (DE-He213)978-3-642-36812-7
  • (SSID)ssj0000880061
  • (PQKBManifestationID)11495320
  • (PQKBTitleCode)TC0000880061
  • (PQKBWorkID)10872477
  • (PQKB)11290626
  • (MiAaPQ)EBC3093049
  • (EXLCZ)993280000000007557
Label
Reconfigurable Computing: Architectures, Tools and Applications : 9th International Symposium, ARC 2013, Los Angeles, CA, USA, March 25-27, 2013. Proceedings, edited by Philip Brisk, José Gabriel de Figueiredo Coutinho, Pedro C. Diniz, (electronic resource)
Publication
Note
International conference proceedings
Antecedent source
mixed
Bibliography note
Includes bibliographical references and author index
Carrier category
online resource
Carrier category code
cr
Carrier MARC source
rdacarrier
Color
not applicable
Content category
text
Content type code
txt
Content type MARC source
rdacontent
Contents
Heterogeneous Reconfigurable System for Adaptive Particle Filters in Real-Time Applications -- Hardware Acceleration of Genetic Sequence Alignment -- An FPGA Acceleration for the Kd-tree Search in Photon Mapping -- SEU Resilience of DES, AES in SRAM-based FPGA -- An Architecture for IPv6 Lookup Using Parallel Index Generation Units -- Hardware Index to Set Partition Converter -- Teaching SoC Using Video Games to Improve Student Engagement -- Parameterized Design and Evaluation of Bandwidth Compressor for Floating-Point Data Streams in FPGA-based Custom Computing -- Hardware Acceleration of Matrix Multiplication Over Small Prime Finite Fields -- Flexible Design of a Modular Simultaneous Exponentiation Core for Embedded Platforms -- Architecture for Transparent Binary Acceleration of Loops with Memory Accesses -- Parametric Optimization of Reconfigurable Designs using Machine Learning -- Fast Template-based Heterogeneous MPSoC Synthesis on FPGA -- Hierarchical and Multiple Switching NoC with Floorplan based Adaptability -- Performance Analysis And Optimization of High Density Tree-Based 3D Multilevel FPGA
Dimensions
unknown
Extent
1 online resource (XVI, 238 p. 104 illus.)
File format
multiple file formats
Form of item
online
Isbn
9783642368127
Level of compression
uncompressed
Media category
computer
Media MARC source
rdamedia
Media type code
c
Other control number
10.1007/978-3-642-36812-7
Quality assurance targets
absent
Reformatting quality
access
Specific material designation
remote
System control number
  • (CKB)3280000000007557
  • (DE-He213)978-3-642-36812-7
  • (SSID)ssj0000880061
  • (PQKBManifestationID)11495320
  • (PQKBTitleCode)TC0000880061
  • (PQKBWorkID)10872477
  • (PQKB)11290626
  • (MiAaPQ)EBC3093049
  • (EXLCZ)993280000000007557

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